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It wont be exact, but if you are using a 555, its probably well within your needs. In any case, I appreciate the help Continue this thread level 1 1 point 5 years ago If your particular simulator supports it, you could use a VerilogAAHDL description of the 555s behaviour. 555 Timer Ice Model Simulator Supports It If Im understanding you correctly, though, the method you are referring to is for visual SPICE implementations, no The only method Ive learned to use the software by is generating everything via code. I havent done much direct netting editing so I cant help here. If youre writing netlists by hand, you should be able to instantiate the SPICE model directly. In the case of say op-amps, SPICE packages often have a generic symbol with no simulation model, so that you can attach a model to it in the schematic view. 555 Timer Ice Model Simulator Supports It.
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